MK33 R1.12 modified from MK33 R1.11:


- Solved reboot hung check point 96h.


- Solved Adaptec AHA-29160 SCSI card failed boot with SCSI HDD ID < SCSI CDROM ID.


- Load "Setup Default" instead of "Turbo Default" when CMOS chksum error.





BIOS chksum : B14Ah


*Formal released BIOS*





MK33 R1.11 modified from AK33 R1.10:


- Power Auto Recovery function implemented as:


	Integrated Peripherals > AC PWR Auto Recovery


	- On


	- Off ( Default )


	- Former Status


- Creative Sound Blaster card noise fixed with NB.Rx70=CEh.


- Model Name/Version strings removed from DMI table.


- Prevent reboot hang C1 issue.


- Support 256M AGP Aperature size option.


- Duron CPU L2 detection issue.





BIOS chksum : 761Eh


*Formal released BIOS*








MK33 R1.09 modified from MK33 R1.08:


1. Remove clock generator frequency options below 100 MHz.


* Formal released BIOS*


Checksum:3DC2








MK33 R1.08 modified from MK33 R1.07:


1. Add AMD Test Platform Solution


Checksum #5F1Eh


* On web site


* FORMAL RELEASED !








MK33 R1.07 modified from MK33 R1.06:


1. Load Turbo Defaults confirmed dialog string fixed.


2. CPU changed warning message cleared.


3. OnChip Sound options "Enable/Disable" corrected to "Enabled/Disabled".


Checksum #4904h








MK33 R1.06 modified from MK33 R1.04:


1. Fix SB I/O, SB IRQ, and SB DMA turned to active if "Onboard Legacy Audio" is selected.


2. Open all clock generator options even not supported by system.


3. Set onboard Audio disabled automatically if any Audio card found.


4. Set Reg.75h bits 4,5 PCI Latency timer to 02h to support S3 PCI Diamond VGA card under Win98SE.


5. Fix Unreport Memory test failure for some LAN cards.


6. Modify P-to-P bridge device ID Reg 44, 46 and 47h.


7. "HOME" key to load default value.


8. Added ICW210 clock chip support.


9. Set SB I/O, SB IRQ, and SB DMA  to also disabled while SB is disabled.


10. Change version control method to "Modbinable".


11. Change CMOS item "Frequency/voltage control" to "CPU/PCI clock control".


Checksum #BC26h








MK33 R1.04 BIOS modified from MK33 R1.02:


1. Patch S3 Diamond AGP card. Set NB offset 0b1h to 7dh, AGP bridge offset 42h bit  5,6.


2. Save and restore AGP card pci registers when entered and leaved S3 state.


3. Report PS2 KB/Mouse _PRW for waken-up system ability check box in W2K.


4. Set SB offset 41h bit 6 to pass reboot test.


5. Change DRAM Clock default setting to AUTO and strings to "PCI CLK x3/4".


6. Remove "EDO DRAM/SDRM  at Bank #" items in the configuration table.


Checksum #B271h


# On web site





MK33 R1.02 BIOS chksum 2A49h modified from R1.01:


North Bridge setting changed:


1. 6Dh bit4 = 0


2. Athlon : 7Fh=02


     Duron: 7Fh=01


Checksum #3FCAh


# On web site